國立中山大學 103學年度第1學期 課程教學大綱
National Sun Yat-sen University 103Academic year1st Semester Course syllabus
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中文名稱 Course name(Chinese) |
電子設計自動化及測試導論 |
課號 Course Code |
GEAI1332 |
英文名稱 Course name(English) |
INTRODUCTION TO ELECTRONIC DESIGN AUTOMATION & TESTING |
課程類別 Type of the course |
講授類 | 必選修 Required/Selected | 選修 |
系所 Dept./faculty |
跨院選修(工) |
授課教師 Instructor |
李淑敏
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學分 Credit |
3 |
因應嚴重特殊傳染性肺炎(武漢肺炎),倘若後續需實施遠距授課,授課方式調整如下: |
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因應嚴重特殊傳染性肺炎(武漢肺炎),倘若後續需實施遠距授課,評分方式調整如下: |
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尚未建立傳染性肺炎(武漢肺炎)課程評分方式﹝評分標準及比例﹞
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課程大綱 Course syllabus |
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CHAPTER 1 Introduction 1.1 Overview of electronic design automation 1.2 Logic design automation 1.3 Test automation 1.4 Physical design automation CHAPTER 2 Fundamentals of CMOS design 2.1 Introduction 2.2 Integrated circuit technology 2.3 CMOS logic 2.4 Integrated circuit design techniques 2.5 CMOS physical design 2.6 Low-power circuit design techniques CHAPTER 3 Design for testability 3.1 Introduction 3.2 Testability analysis 3.3 Scan design 3.4 Logic built-in self-test 3.5 Test Compression CHAPTER 4 Fundamentals of algorithms 4.1 Introduction 4.2 Computational complexity 4.3 Graph algorithms 4.4 Heuristic algorithms 4.5 Mathematical programming CHAPTER 5 Electronic system-level design and high-level synthesis 5.1 Introduction 5.2 Fundamentals of High-level synthesis 5.3 High-level synthesis algorithm overview 5.4 Scheduling 5.5 Register binding 5.6 Functional unit binding CHAPTER 6 Logic synthesis in a nutshell 6.1 Introduction 6.2 Data Structures for Boolean representation 6.3 Combinational logic minimization 6.4 Technology mapping 6.5 Timing analysis 6.6 Timing optimization CHAPTER 7 Test synthesis 7.1 Introduction 7.2 Scan design 7.3 Logic built-in self-test (BIST) design 7.4 RTL Design for testability CHAPTER 8 Logic and circuit simulation 8.1 Introduction 8.2 Logic simulation models 8.3 Logic simulation techniques 8.4 Hardware-accelerated logic simulation 8.5 Circuit simulation models 8.6 Numerical methods for transient analysis 8.7 Simulation of VLSI interconnects 8.8 Simulation of nonlinear devices CHAPTER 9 Functional verification 9.1 Introduction 9.2 Verification hierarchy 9.3 Measuring verification quality 9.4 Simulation-based approach 9.5 Formal approaches 9.6 Advanced research CHAPTER 10 Floorplanning 10.1 Introduction 10.2 Simulated annealing approach 10.3 Analytical approach 10.4 Modern floorplanning considerations CHAPTER 11 Placement 11.1 Introduction 11.2 Problem formulations 11.3 Global placement: partitioning-based approach 11.4 Global placement: simulated annealing approach 11.5 Global placement: analytical approach 11.6 Legalization 11.7 Detailed placement CHAPTER 12 Global and detailed routing 12.1 Introduction 12.2 Problem definition 12.3 General-purpose routing 12.4 Global routing 12.5 Detailed Routing 12.6 Modern routing considerations CHAPTER 13 Synthesis of clock and power/ground network 13.1 Introduction 13.2 Design considerations 13.3 Clock Network design 13.4 Power/ground network design CHAPTER 14 Fault Simulation and Test Generation 14.1 Introduction 14.2 Fault Collapsing 14.3 Fault Simulation 14.4 Test Generation 14.5 Advanced Test Generation
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課程目標 Objectives |
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讓學生認識電子設計自動化,並培養設計測試架構系統的能力
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授課方式 Teaching methods |
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評分方式﹝評分標準及比例﹞Evaluation (Criteria and ratio)等第制單科成績對照表 letter grading reference
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1.期中:25% 2.期末:25% 3.出席:25% 4.額外加分:25%
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參考書/教科書/閱讀文獻 Reference book/ textbook/ documents
〔請遵守智慧財產權觀念,不可非法影印。教師所提供之教材供學生本人自修學習使用,不得散播及做為商業用途〕
No copies for intellectual property rights. Textbooks provided by the instructor used only for self-study, can not broadcast or commercial use
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序號 | 作者 | 書名 | 出版社 | 出版年 | 出版地 | ISBN# | 1 | Laung-Terng Wang, Yao-Wen Chang, Kwang-Ting Cheng | Electronic Design Automation | Morgan Kaufmann | 2009 | | 978-0-12-374364-0 | 2 | Charles C. Chiang & Jamil Kawa | Design for Manufacturability and Yield for Nano-Scale Cmos | Springer | 2007 | | 978-1-4020-5187-6 | 3 | Sabih H. Gerez | Algorithms for VLSI Design Automation | John Wiley & Sons | 1999 | | 0-471-98489-2 | 4 | Sadiq M. Sait & Habib Youssef | Vlsi Physical Design Automation | McGRAW-HILL Book Co. Europe | 1995 | | 0-07-707742-3 | 5 | Naveed Sherwani | Algorithms for VLSI Physical Design Automation | Kluwer Academic Publishers Toppan Co. Pte Ltd. | 1995 | | 981-00-7849-8 | 6 | Giovanni De Micheli | Synthesis sand Optimization of Digital Circuits | McGraw-Hill, Inc. | 1994 | | 0-07-113271-6 |
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彈性暨自主學習規劃 Alternative learning periods
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每週課程內容及預計進度 Weekly scheduled progress |
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週次 | 日期 | 授課內容及主題 | 1 | 2014/09/15~2014/09/21 | CHAPTER 1 Introduction | 2 | 2014/09/22~2014/09/28 | CHAPTER 2 Fundamentals of CMOS design | 3 | 2014/09/29~2014/10/05 | CHAPTER 3 Design for testability & CHAPTER 4 Fundamentals of algorithms | 4 | 2014/10/06~2014/10/12 | 國慶放假 | 5 | 2014/10/13~2014/10/19 | CHAPTER 5 Electronic system-level design and high-level synthesis | 6 | 2014/10/20~2014/10/26 | CHAPTER 6 Logic synthesis in a nutshell | 7 | 2014/10/27~2014/11/02 | CHAPTER 7 Test synthesis | 8 | 2014/11/03~2014/11/09 | CHAPTER 8 Logic and circuit simulation | 9 | 2014/11/10~2014/11/16 | CHAPTER 9 Functional verification | 10 | 2014/11/17~2014/11/23 | CHAPTER 10 Floorplanning | 11 | 2014/11/24~2014/11/30 | 期中報告 | 12 | 2014/12/01~2014/12/07 | 期中報告 & CHAPTER 11 Placement | 13 | 2014/12/08~2014/12/14 | CHAPTER 11 Placement | 14 | 2014/12/15~2014/12/21 | CHAPTER 12 Global and detailed routing | 15 | 2014/12/22~2014/12/28 | CHAPTER 13 Synthesis of clock and power/ground network | 16 | 2014/12/29~2015/01/04 | CHAPTER 14 Fault Simulation and Test Generation | 17 | 2015/01/05~2015/01/11 | Project demo | 18 | 2015/01/12~2015/01/18 | Project demo |
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課業討論時間 Office hours |
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時段1: 時間:星期三10:00~ 12:00 地點:F5028 時段2: 時間:星期四10:00~ 12:00 地點:F5028
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系所學生專業能力/全校學生基本素養與核心能力 basic disciplines and core capabilitics of the dcpartment and the university |
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系所學生專業能力/全校學生基本素養與核心能力 | 課堂活動與評量方式 | 本課程欲培養之能力與素養 | 紙筆考試或測驗 | 課堂討論︵含個案討論︶ | 個人書面報告、作業、作品、實驗 | 群組書面報告、作業、作品、實驗 | 個人口頭報告 | 群組口頭報告 | 課程規畫之校外參訪及實習 | 證照/檢定 | 參與課程規畫之校內外活動及競賽 | 課外閱讀 | ※系所所學生專業能力 | |
1.具備計算機科學領域的基本知識與能力,包含數學基礎、資料結構與演算法、軟體設計、計算機組織與結構、作業系統。 | V | | | | | | | | | | | 2.深入瞭解計算機科學中一種或多種重要領域的知識。 | | | | | | | | | | | | 3.運用數學、科學及工程知識以發掘、分析及處理計算機科學問題的能力。 | | | | | | | | | | | | 4.設計與執行實驗,以及分析與詮釋數據的能力。 | V | | | | | | | | | | | 5.使用計算機科學實務所需技術、技巧與工具的能力。 | | | | | | | | | | | | 6.設計與整合資訊軟、硬體系統或元件的能力。 | V | | | | | | | | | | | 7.有效的溝通與團隊合作的能力。 | | | | | | | | | | | | 8.認識時事議題,瞭解計算機科學技術對環境、社會及全球的影響。 | | | | | | | | | | | | 9.培養持續學習與獨立學習的習慣與能力。 | | | | | | | | | | | | 10.具有文化內涵與藝術鑑賞能力。 | | | | | | | | | | | | 11.認知專業倫理及社會責任。 | | | | | | | | | | | | ※全校學生基本素養與核心能力 | |
1.表達與溝通能力。 | | | | | | | | | | | | 2.探究與批判思考能力。 | | | | | | | | | | | | 3.終身學習能力。 | V | | | | | | | | | | | 4.倫理與社會責任。 | V | | | | | | | | | | | 5.美感品味。 | | | | | | | | | | | | 6.創造力。 | | | | | | | | | | | | 7.全球視野。 | V | | | | | | | | | | | 8.合作與領導能力。 | | | | | | | | | | | | 9.山海胸襟與自然情懷。 | | | | | | | | | | | |
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本課程與SDGs相關項目:The course relates to SDGs items: |
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本課程校外實習資訊: This course is relevant to internship: |
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