國立中山大學 103學年度第1學期 課程教學大綱

National Sun Yat-sen University 103Academic year1st Semester Course syllabus

中文名稱
Course name(Chinese)

電子設計自動化及測試導論

課號
Course Code

GEAI1332

英文名稱
Course name(English)

INTRODUCTION TO ELECTRONIC DESIGN AUTOMATION & TESTING

課程類別
Type of the course

講授類

必選修
Required/Selected

選修

系所
Dept./faculty

跨院選修(工)

授課教師
Instructor

李淑敏    

學分
Credit

3

因應嚴重特殊傳染性肺炎(武漢肺炎),倘若後續需實施遠距授課,授課方式調整如下:

         尚未建立傳染性肺炎(武漢肺炎)授課方式調整

因應嚴重特殊傳染性肺炎(武漢肺炎),倘若後續需實施遠距授課,評分方式調整如下:

         尚未建立傳染性肺炎(武漢肺炎)課程評分方式﹝評分標準及比例﹞

課程大綱 Course syllabus

         CHAPTER 1 Introduction
1.1 Overview of electronic design automation
1.2 Logic design automation
1.3 Test automation
1.4 Physical design automation
CHAPTER 2 Fundamentals of CMOS design
2.1 Introduction
2.2 Integrated circuit technology
2.3 CMOS logic
2.4 Integrated circuit design techniques
2.5 CMOS physical design
2.6 Low-power circuit design techniques
CHAPTER 3 Design for testability
3.1 Introduction
3.2 Testability analysis
3.3 Scan design
3.4 Logic built-in self-test
3.5 Test Compression
CHAPTER 4 Fundamentals of algorithms
4.1 Introduction
4.2 Computational complexity
4.3 Graph algorithms
4.4 Heuristic algorithms
4.5 Mathematical programming
CHAPTER 5 Electronic system-level design and high-level synthesis
5.1 Introduction
5.2 Fundamentals of High-level synthesis
5.3 High-level synthesis algorithm overview
5.4 Scheduling
5.5 Register binding
5.6 Functional unit binding
CHAPTER 6 Logic synthesis in a nutshell
6.1 Introduction
6.2 Data Structures for Boolean representation
6.3 Combinational logic minimization
6.4 Technology mapping
6.5 Timing analysis
6.6 Timing optimization
CHAPTER 7 Test synthesis
7.1 Introduction
7.2 Scan design
7.3 Logic built-in self-test (BIST) design
7.4 RTL Design for testability
CHAPTER 8 Logic and circuit simulation
8.1 Introduction
8.2 Logic simulation models
8.3 Logic simulation techniques
8.4 Hardware-accelerated logic simulation
8.5 Circuit simulation models
8.6 Numerical methods for transient analysis
8.7 Simulation of VLSI interconnects
8.8 Simulation of nonlinear devices
CHAPTER 9 Functional verification
9.1 Introduction
9.2 Verification hierarchy
9.3 Measuring verification quality
9.4 Simulation-based approach
9.5 Formal approaches
9.6 Advanced research
CHAPTER 10 Floorplanning
10.1 Introduction
10.2 Simulated annealing approach
10.3 Analytical approach
10.4 Modern floorplanning considerations
CHAPTER 11 Placement
11.1 Introduction
11.2 Problem formulations
11.3 Global placement: partitioning-based approach
11.4 Global placement: simulated annealing approach
11.5 Global placement: analytical approach
11.6 Legalization
11.7 Detailed placement
CHAPTER 12 Global and detailed routing
12.1 Introduction
12.2 Problem definition
12.3 General-purpose routing
12.4 Global routing
12.5 Detailed Routing
12.6 Modern routing considerations
CHAPTER 13 Synthesis of clock and power/ground network
13.1 Introduction
13.2 Design considerations
13.3 Clock Network design
13.4 Power/ground network design
CHAPTER 14 Fault Simulation and Test Generation
14.1 Introduction
14.2 Fault Collapsing
14.3 Fault Simulation
14.4 Test Generation
14.5 Advanced Test Generation






課程目標 Objectives

         讓學生認識電子設計自動化,並培養設計測試架構系統的能力






授課方式 Teaching methods

         課堂授課、論文閱讀及Project實作






評分方式﹝評分標準及比例﹞Evaluation (Criteria and ratio)等第制單科成績對照表 letter grading reference

        
1.期中25%
2.期末25%
3.出席25%
4.額外加分25%

參考書/教科書/閱讀文獻 Reference book/ textbook/ documents
〔請遵守智慧財產權觀念,不可非法影印。教師所提供之教材供學生本人自修學習使用,不得散播及做為商業用途〕
No copies for intellectual property rights. Textbooks provided by the instructor used only for self-study, can not broadcast or commercial use

        
序號作者書名出版社出版年出版地ISBN#
1Laung-Terng Wang, Yao-Wen Chang, Kwang-Ting ChengElectronic Design AutomationMorgan Kaufmann2009978-0-12-374364-0
2Charles C. Chiang & Jamil KawaDesign for Manufacturability and Yield for Nano-Scale CmosSpringer2007978-1-4020-5187-6
3Sabih H. GerezAlgorithms for VLSI Design AutomationJohn Wiley & Sons19990-471-98489-2
4Sadiq M. Sait & Habib YoussefVlsi Physical Design AutomationMcGRAW-HILL Book Co. Europe19950-07-707742-3
5Naveed SherwaniAlgorithms for VLSI Physical Design AutomationKluwer Academic Publishers Toppan Co. Pte Ltd.1995981-00-7849-8
6Giovanni De MicheliSynthesis sand Optimization of Digital CircuitsMcGraw-Hill, Inc.19940-07-113271-6

彈性暨自主學習規劃 Alternative learning periods

本門課程是否有規劃實施學生彈性或自主學習內容(每1學分2小時)
Is any alternative learning periods planned for this course (with each credit corresponding to two hours of activity)?
否:教師需於「每週課程內容及預計進度」填寫18週課程進度(每1學分18小時之正課內容)。
No:The instructor will include an 18-week course plan in the weekly scheduled progress (each credit corresponds to 18 hours of instruction)
是:教師需於「每週課程內容及預計進度」填寫16週課程內容(每1學分16小時之正課內容),並於下列欄位填寫每1學分2小時學生彈性或自主學習內容。
    Yes:The instructor will include a 16-week course plan in the weekly scheduled progress (each credit corresponds to 16 hours of instruction);the details of the planned alternative learning periods are provided below (each credit corresponds to two hours of activity).

學生彈性或自主學習活動
Alternative learning periods
勾選或填寫規劃內容
Place a check in the appropriate box or provide details
時數
Number of hours
學生分組實作及討論
Group work and discussion
參與課程相關作業、作品、實驗
Participation in course-related assignments, work, or experiments
參與校內外活動(研習營、工作坊、參訪)或競賽
Participation in on- or off-campus activities (e.g., seminars, workshops, and visits) or competitions
課外閱讀
Extracurricular reading
線上數位教材學習
Learning with online digital learning materials
其他(請填寫規劃內容)
Other (please provide details)

每週課程內容及預計進度 Weekly scheduled progress

        
週次日期授課內容及主題
12014/09/15~2014/09/21CHAPTER 1 Introduction
22014/09/22~2014/09/28CHAPTER 2 Fundamentals of CMOS design
32014/09/29~2014/10/05CHAPTER 3 Design for testability & CHAPTER 4 Fundamentals of algorithms
42014/10/06~2014/10/12國慶放假
52014/10/13~2014/10/19CHAPTER 5 Electronic system-level design and high-level synthesis
62014/10/20~2014/10/26CHAPTER 6 Logic synthesis in a nutshell
72014/10/27~2014/11/02CHAPTER 7 Test synthesis
82014/11/03~2014/11/09CHAPTER 8 Logic and circuit simulation
92014/11/10~2014/11/16CHAPTER 9 Functional verification
102014/11/17~2014/11/23CHAPTER 10 Floorplanning
112014/11/24~2014/11/30期中報告
122014/12/01~2014/12/07期中報告 & CHAPTER 11 Placement
132014/12/08~2014/12/14CHAPTER 11 Placement
142014/12/15~2014/12/21CHAPTER 12 Global and detailed routing
152014/12/22~2014/12/28CHAPTER 13 Synthesis of clock and power/ground network
162014/12/29~2015/01/04CHAPTER 14 Fault Simulation and Test Generation
172015/01/05~2015/01/11Project demo
182015/01/12~2015/01/18Project demo

課業討論時間 Office hours

         時段1:
時間:星期三10:00~ 12:00
地點:F5028
時段2:
時間:星期四10:00~ 12:00
地點:F5028

系所學生專業能力/全校學生基本素養與核心能力 basic disciplines and core capabilitics of the dcpartment and the university

        
系所學生專業能力/全校學生基本素養與核心能力課堂活動與評量方式
本課程欲培養之能力與素養紙筆考試或測驗課堂討論︵含個案討論︶個人書面報告、作業、作品、實驗群組書面報告、作業、作品、實驗個人口頭報告群組口頭報告課程規畫之校外參訪及實習證照/檢定參與課程規畫之校內外活動及競賽課外閱讀
※系所所學生專業能力
1.具備計算機科學領域的基本知識與能力,包含數學基礎、資料結構與演算法、軟體設計、計算機組織與結構、作業系統。 V          
2.深入瞭解計算機科學中一種或多種重要領域的知識。            
3.運用數學、科學及工程知識以發掘、分析及處理計算機科學問題的能力。            
4.設計與執行實驗,以及分析與詮釋數據的能力。 V          
5.使用計算機科學實務所需技術、技巧與工具的能力。            
6.設計與整合資訊軟、硬體系統或元件的能力。 V          
7.有效的溝通與團隊合作的能力。            
8.認識時事議題,瞭解計算機科學技術對環境、社會及全球的影響。            
9.培養持續學習與獨立學習的習慣與能力。            
10.具有文化內涵與藝術鑑賞能力。            
11.認知專業倫理及社會責任。            
※全校學生基本素養與核心能力
1.表達與溝通能力。           
2.探究與批判思考能力。           
3.終身學習能力。V          
4.倫理與社會責任。V          
5.美感品味。           
6.創造力。           
7.全球視野。V          
8.合作與領導能力。           
9.山海胸襟與自然情懷。           

本課程與SDGs相關項目:The course relates to SDGs items:

         尚未建立SDGS資料

本課程校外實習資訊: This course is relevant to internship:

         本課程無註記包含校外實習

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